sample of publications

• articles 

  • Error Detection and Mitigation of Data-Intensive Microprocessor Applications Using SIMD and Trace Monitoring.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  67:1452-1460. 2020
  • A true random number generator based on gait data for the Internet of You.  IEEE Access.  8:71642-71651. 2020
  • The use of microprocessor trace infrastructures for radiation-induced fault diagnosis.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  67:126-134. 2020
  • Dual-Core Lockstep enhanced with redundant multithread support and control-flow error detection.  MICROELECTRONICS RELIABILITY.  100-101:1-5. 2019
  • Analysis of neutron sensitivity and data-flow error detection in ARM microprocessors using NEON SIMD extensions.  MICROELECTRONICS RELIABILITY.  100-101:1-5. 2019
  • Online error detection through trace infrastructure in ARM microprocessors.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  66:1558-1578. 2019
  • PTM-based hybrid error-detection architecture for ARM microprocessors.  MICROELECTRONICS RELIABILITY.  88:925-930. 2018
  • Total ionizing dose effects on a delay-based physical unclonable function implemented in FPGAs.  Electronics.  7. 2018
  • Evaluation of the Suitability of NEON SIMD Microprocessor Extensions Under Proton Irradiation.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  65:1835-1842. 2018
  • On the Entropy of Oscillator-Based True Random Number Generators under Ionizing Radiation.  Entropy.  20. 2018
  • Dynamic control of entropy and power consumption in TRNGs for IoT applications.  IEICE Electronics Express.  15:1-11. 2018
  • Towards a Dependable True Random Number Generator With Self-Repair Capabilities.  IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS.  65:247-256. 2018
  • A hybrid fault-tolerant LEON3 soft core processor implemented in low-end SRAM FPGA.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  64:374-381. 2017
  • Error Mitigation Using Approximate Logic Circuits: A Comparison of Probabilistic and Evolutionary Approaches.  IEEE TRANSACTIONS ON RELIABILITY.  65:1871-1883. 2016
  • Partial TMR in FPGAs Using Approximate Logic Circuits.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  63:2233-2240. 2016
  • A Hardware-Software Approach for On-Line Soft Error Mitigation in Interrupt-Driven Applications.  IEEE Transactions on Dependable and Secure Computing.  13:502-508. 2016
  • Online test of control flow errors: a new debug interface-based approach.  IEEE TRANSACTIONS ON COMPUTERS.  65:1846-1855. 2016
  • Using Benchmarks for Radiation Testing of Microprocessors and FPGAs.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  62:2547-2554. 2015
  • A New Hybrid Nonintrusive Error-Detection Technique Using Dual Control-Flow Monitoring.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  61:3236-3243. 2014
  • Efficient mitigation of data and control-flow errors in microprocessors.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  61:1590-1596. 2014
  • Low-Power Design in Aerospace Circuits: A Case Study.  IEEE AEROSPACE AND ELECTRONIC SYSTEMS MAGAZINE.  28:46-52. 2013
  • SEU Sensitivity Comparison for Different Reprogrammable Technologies With Minority Check Block.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  60:2813-2818. 2013
  • Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach.  JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS.  28:777-789. 2012
  • A co-design approach for SET mitigation in embedded systems.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  59:1034-1039. 2012
  • Constrained Placement Methodology for Reducing SER Under Single-Event-Induced Charge Sharing Effects.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  59:811-817. 2012
  • On the use of embedded debug features for permanent and transient fault resilience in microprocessors.  MICROPROCESSORS AND MICROSYSTEMS.  36:334-343. 2012
  • Soft Error Sensitivity Evaluation of Microprocessors by Multilevel Emulation-Based Fault Injection.  IEEE TRANSACTIONS ON COMPUTERS.  61:313-322. 2012
  • Analyzing the Impact of Single-Event-Induced Charge Sharing in Complex Circuits.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  58 :2768-2775. 2011
  • Analysis of SET effects in a PIC microprocessor for selective hardening.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  58:1078-1085. 2011
  • Sensitivity Evaluation Method for Aerospace Digital Systems With Collaborative Hardening.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  58:1053-1058. 2011
  • Fault Injection in Modern Microprocessors Using On-Chip Debugging Infrastructures.  IEEE Transactions on Dependable and Secure Computing.  8:308-314. 2011
  • Extensive SEU Impact Analysis of a PIC Microprocessor for Selective Hardening.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  57:1986-1991. 2010
  • SET Emulation Considering Electrical Masking Effects.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  56:2015-2021. 2009
  • Analysis of Turbo Decoder Robustness Against SEU Effects.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  56:2184-2188. 2009
  • SET Emulation under a Quantized Delay Model.  JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS.  25:107-116. 2009

• book chapters 

  • Fault-tolerance techniques for soft-core processors using the trace interface. In: FPGAs and parallel architectures for aerospace applications.  SPRINGER. 293-293-306. 2016
  • Hardware Fault Injection. In: Soft Errors in Modern Electronic Systems.  SPRINGER. 141-166. 2010

• conference contributions 

  • Fault Injection and Formal Verification Methodologies 2019
  • Radiation Effects and Mitigation Techniques in FPGAs: the Complexity Challenge (Short Course Program "Prepare for the next decade") 2019
  • Approximate TMR for selective error mitigation in FPGAs based on testability analysis.  112-119. 2018
  • Flexible approaches to fault-tolerant microprocessors for space aplications 2015
  • A New Hybrid Non-Intrusive Error-Detection Technique Using Dual Control-Flow Monitoring 2014
  • A method to assess the robustness of cryptographic circuits at the design stage.  1354-1360. 2014
  • A new solution to on-line detection of Control Flow Errors.  105-110. 2014
  • Assessing SET sensitivity of a PLL.  1-6. 2014
  • Comparative of software-based hardening techniques for LEON 3 microprocessor 2014
  • Error masking with approximate logic circuits using dynamic probability estimations.  134-139. 2014
  • C-Element model for SET fault emulation.  1-4. 2013
  • Efficient mitigation of data and control-Flow errors in microprocessors.  1-4. 2013
  • Exploiting the debug interface to support on-line test of control flow errors.  98-103. 2013
  • SEU Sensitivity Comparison for Different Reprogrammable Technologies With Minority Check Block.  2813-2818. 2013
  • Approximate logic functions for SET mitigation in sequential circuits.  195-200. 2012
  • Logic Masking for SET Mitigation Using Approximate Logic Circuits.  176-181. 2012
  • SET Fault Injection Attacks on a Hardware Implementation of the SHA Cypher 2012
  • SEU Sensitivity of Robust Communication Protocols.  188-193. 2012
  • A Recovery Mechanism for SET Protection Using Standard-Cells.  128-131. 2011
  • ATOM: A Pseudorandom Number Generator Suitable for RFID Protocols 2011
  • Akari-X: A Pseudorandom Number Generator for Secure Lightweight Systems.  228-233. 2011
  • Control Flow Checking through Embedded Debug Interface 2011
  • Study on the Effect of Multiple Errors in Robust Systems Based on Critical Task Distribution.  463-466. 2011
  • Using an FPGA-Based Fault Injection Technique to Evaluate Software Robustness Under SEEs: A Case Study 2011
  • Analysis of Turbo Decoder Robustness Against SEU Effects 2008
  • Coarse-Grain Dynamically Reconfigurable Coprocessor for Image Processing in SoPC 2008
  • Redundancia temporal configurable para algoritmos criptográficos robustos 2008
  • SET Emulation Considering Electrical Masking Effects 2008
  • Smart Hardening for Round-based Encryption Algoritms: Application to Advanced Encryptijon Standard 2008
  • The Effects of Proton Irradiation on CoolRunner-II CPLD Technology 2008