researchers
- PORTELA GARCIA, MARTA Principal Researcher
- ENTRENA ARRONTES, LUIS ALFONSO Researcher
- GARCIA VALDERAS, MARIO Researcher
- LINDOSO MUÑOZ, ALMUDENA Researcher
- GARCIA ASTUDILLO, LUIS ANGEL Researcher
Verification of Seu-Mitigation Techniques in 3rd 4th Generation Flash FPGAs
Projects
Overview
type
- R+D Contract
date/time interval
- June 7, 2018 - December 7, 2019
funding entity
Classification
keywords
- diseño electrónico robusto; aplicaciones espaciales; verificación de circuitos