sample of publications

• articles 

  • Formal Verification of Fault-Tolerant Hardware Designs.  IEEE Access.  40:116127-116140. 2023
  • Evaluating Reduced Resolution Redundancy for Radiation Hardening in FPGA Designs.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  70. 2023
  • Analyzing Scaled Reduced Precision Redundancy for Error Mitigation under Proton Irradiation.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  69:1485-1491. 2022
  • Reliability Evaluation of LU Decomposition on GPU-Accelerated System-on-Chip Under Proton Irradiation.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  69:1467-1474. 2022
  • Solar Energy Harvesting to Improve Capabilities of Wearable Devices.  SENSORS.  22:3950-3971. 2022
  • Analyzing Reduced Precision Triple Modular Redundancy under Proton Irradiation.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  69:470-477. 2022
  • Comparison of parallel implementation strategies in GPU-accelerated System-on-Chip under proton irradiation.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  69:444-452. 2022
  • Radiation Testing of a Multiprocessor Macrosynchronized Lockstep Architecture With FreeRTOS.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  69:462-469. 2021
  • Error sensitivity study of FFT architectures implemented in FPGA.  MICROELECTRONICS RELIABILITY.  126:1-5. 2021
  • Error Detection and Mitigation of Data-Intensive Microprocessor Applications Using SIMD and Trace Monitoring.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  67:1452-1460. 2020
  • The Use of Microprocessor Trace Infrastructures for Radiation-Induced Fault Diagnosis.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  67:126-134. 2020
  • Analysis of neutron sensitivity and data-flow error detection in ARM microprocessors using NEON SIMD extensions.  MICROELECTRONICS RELIABILITY.  100-101:113346. 2019
  • Dual-Core Lockstep enhanced with redundant multithread support and control-flow error detection.  MICROELECTRONICS RELIABILITY.  100-101:113447. 2019
  • Online error detection through trace infrastructure in ARM microprocessors.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  66:1457-1464. 2019
  • PTM-based hybrid error-detection architecture for ARM microprocessors.  MICROELECTRONICS RELIABILITY.  88-90:925-930. 2018
  • Evaluation of the Suitability of NEON SIMD Microprocessor Extensions Under Proton Irradiation.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  65:1835-1842. 2018
  • HW/SW Co-Simulation System for Enhancing Hardware-in-the-Loop of Power Converter Digital Controllers.  IEEE Journal of Emerging and Selected Topics in Power Electronics.  5:1779-1786. 2017
  • A hybrid fault-tolerant LEON3 soft core processor implemented in low-end SRAM FPGA.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  64:374-381. 2017
  • Partial TMR in FPGAs Using Approximate Logic Circuits.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  63:2233-2240. 2016
  • Using Benchmarks for Radiation Testing of Microprocessors and FPGAs.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  62:2547-2554. 2015
  • Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach.  JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS.  28:777-789. 2012
  • On the use of embedded debug features for permanent and transient fault resilience in microprocessors.  MICROPROCESSORS AND MICROSYSTEMS.  36:334-343. 2012
  • Soft Error Sensitivity Evaluation of Microprocessors by Multilevel Emulation-Based Fault Injection.  IEEE TRANSACTIONS ON COMPUTERS.  61:313-322. 2012
  • Analysis of SET effects in a PIC microprocessor for selective hardening.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  58:1078-1085. 2011
  • Fault Injection in Modern Microprocessors Using On-Chip Debugging Infrastructures.  IEEE Transactions on Dependable and Secure Computing.  8:308-314. 2011
  • SET Emulation Considering Electrical Masking Effects.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  56:2015-2021. 2009
  • Analysis of Turbo Decoder Robustness Against SEU Effects.  IEEE TRANSACTIONS ON NUCLEAR SCIENCE.  56:2184-2188. 2009
  • SET Emulation under a Quantized Delay Model.  JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS.  25:107-116. 2009

• book chapters 

  • Hardware Fault Injection. In: Soft Errors in Modern Electronic Systems.  SPRINGER. 141-166. 2010

• conference contributions 

  • Design Space Analysis for a Digital Lock-In Amplifier for Infrared Gas Sensor Signal Acquisition.  1-6. 2023
  • Low power consumption online testing technique for wearable wireless body area networks 2022
  • Evaluation of a multiprocessor system hardened with macro-synchronized lockstep with FreeRTOS OS using proton irradiation 2021
  • Assessing SET Sensitivity of Mixed-Signal Circuits at Early Design Stages.  1-6. 2020
  • System Dependability in Edge Computing Wearable Devices.  1-6. 2020
  • Embedded Emotion Recognition within Cyber-Physical Systems using Physiological Signals 2018
  • On-line testing of sensor networks: a case study.  201-202. 2017
  • Flexible approaches to fault-tolerant microprocessors for space aplications 2015
  • The Use of Benchmarks for High-Reliability Systems 2015
  • Verifying hardening techniques for distributed electronic systems in critical applications 2015
  • A method to assess the robustness of cryptographic circuits at the design stage.  1354-1360. 2014
  • Assesing SET Sensitivity of PLL.  1-6. 2014
  • Assessing SET sensitivity of a PLL.  1-6. 2014
  • Error masking with approximate logic circuits using dynamic probability estimations.  134-139. 2014
  • Reducing SEU sensitivity in LIN networks: selective and collaborative hardening techniques.  1-6. 2014
  • C-Element model for SET fault emulation.  1-4. 2013
  • FPGA-based implementation for steganalysis: a JPEG-compatibility algorithm 2013
  • Hardening digital systems with distributed functionality: robust networks 2013
  • Hardening of serial communication protocols for potentially critical systems in automotive applications: LIN bus.  13-18. 2013
  • SEU Sensitivity Comparison for Different Reprogrammable Technologies With Minority Check Block.  2813-2818. 2013
  • Approximate logic functions for SET mitigation in sequential circuits.  195-200. 2012
  • Logic Masking for SET Mitigation Using Approximate Logic Circuits.  176-181. 2012
  • SET Fault Injection Attacks on a Hardware Implementation of the SHA Cypher 2012
  • SEU Sensitivity of Robust Communication Protocols.  188-193. 2012
  • A Recovery Mechanism for SET Protection Using Standard-Cells.  128-131. 2011
  • Sensitivity Evaluation Method for Aerospace Digital Systems with Collaborative Hardening.  1053-1058. 2011
  • Study on the Effect of Multiple Errors in Robust Systems Based on Critical Task Distribution.  463-466. 2011
  • Using an FPGA-Based Fault Injection Technique to Evaluate Software Robustness Under SEEs: A Case Study 2011
  • Extensive SEU impact analysis of a PIC microprocessor for selective hardening.  1986-1991. 2010
  • Analysis of Turbo Decoder Robustness Against SEU Effects 2008
  • Redundancia temporal configurable para algoritmos criptográficos robustos 2008
  • SET Emulation Considering Electrical Masking Effects 2008
  • Smart Hardening for Round-based Encryption Algoritms: Application to Advanced Encryptijon Standard 2008
  • The Effects of Proton Irradiation on CoolRunner-II CPLD Technology 2008