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The results of applying low-power design techniques to a circuit used in a space application have been presented. The design used for the experiments was implemented in an antifuse FPGA (ACTEL RT14100A). Power consumption was first estimated by simulation of the design to identify the elements that had a higher impact on the total power consumption. According to the power estimations, the more suitable power reduction techniques were identified and applied to reduce power consumption of the initial design. With this approach, the worst-case power consumption was reduced to 30% of the original power estimations by using gated clocks and redesigning small critical components with an asynchronous style. Further reduction, typically up to 16% of the original value, was possible by applying architectural modifications. These results show that important power savings are possible for FPGA designs by following the appropriate methodology. Precise estimation of the contribution of the various functional units to the total power is essential to target only those modifications that are significant from the power point of view and to avoid large redesign efforts.
lower power electronics; aerospace electronics; design methodology; power consumption; digital systems; circuit synthesis; fpgas