Co-author Network
Co-researcher Network
sample of publications
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articles
- N Parallel Paths for Non-Linearity Mitigation in Ring Oscillator based Analog-to-Digital Conversion. AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS. 170. 2023
- N Parallel paths for non-linearity mitigation in ring oscillator based analog-to-digital conversion. AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS. 170. 2023
- A VCO-Based ADC With Inherent Mixing Capability and Local Oscillator Suppression in 55-nm CMOS. IEEE Transactions on Circuits and Systems II: Express Briefs. 70. 2023
- Delay Cell for Highly-Linear Current-Controlled Oscillator-Based Analog-to-Digital Conversion. IEEE Transactions on Circuits and Systems II: Express Briefs. 70. 2023
- A VCO-ADC Linearized by a Capacitive Frequency-to-Current Converter. IEEE Transactions on Circuits and Systems II: Express Briefs. 70. 2023
- A VCO-based ADC with inherent mixing capability and local oscillator suppression in 55nm CMOS. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS. 70:3338-3342. 2023
- A VCO-ADC Linearized by a Capacitive Frequency-to-Current Converter. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS. 70:1841-1845. 2023
- A Gray-Encoded Ring oscillator for Efficient Frequency-to-Digital Conversion in VCO-Based ADCs. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS. 2022
- Ring-oscillator with multiple transconductors for linear analog-to-digital conversion. Electronics. 10:1-15. 2021
- Time-encoding-based ultra-low power features extraction circuit for speech recognition tasks. Electronics. 9:1-12. 2020
- A Pulse Frequency Modulation VCO-ADC in 40nm. IEEE Transactions on Circuits and Systems II: Express Briefs. 66:51-55. 2019
- 0.04-mm(2) 103-dB-A Dynamic Range Second-Order VCO-Based Audio Sigma Delta ADC in 0.13-mu m CMOS. IEEE JOURNAL OF SOLID-STATE CIRCUITS. 53:1731-1742. 2018
- VCO-based ADC with a simplified DAC for non-linearity correction. ELECTRONICS LETTERS. 54:813-815. 2018
- A pulse frequency modulation interpretation of VCOs enabling VCO-ADC architectures with extended noise shaping. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS. 65:444-457. 2018
- SNDR Limits of Oscillator-Based Sensor Readout Circuits.. SENSORS. 18. 2018
- VCO-based sturdy MASH ADC architecture. ELECTRONICS LETTERS. 53:14-15. 2017
- Analytical Evaluation of VCO-ADC Quantization Noise Spectrum Using Pulse Frequency Modulation. IEEE SIGNAL PROCESSING LETTERS. 22:249-253. 2015
- Oversampled ADC based on pulse frequency modulator and TDC. ELECTRONICS LETTERS. 50:498-499. 2014
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conference contributions
- Towards ultra-low power consumption VAD architectures with mixed signal circuits. 1-5. 2023
- A Phase-Encoded Voice Features Extraction Circuit Using Digital Mixers and Analog Filters based on Ring Oscillators 2022
- A maximally-digital VCO-ADC with inherent mixing input capability 2022
- Desafíos en la visibilización del dolor en enfermedades de mujeres: una propuesta de abordaje. 1-14. 2022
- ¡Esto lo preguntan seguro! 2022
- A low power and low area mixed-signal neuronal cell for spiking neural networks. 313-316. 2021
- High-Speed and Energy-Efficient Ring-Oscillator for Analog-to-Digital Conversion. 1-5. 2020
- Low Power Phase-Encoded MAC Accelerator for Smart Sensors with VCO-based ADCs. 261-264. 2020
- Resolution Enhancement of VCO-based ADCs by Passive Interpolation and Phase Injection. 1-5. 2020
- VCO-ADC Linearization by Switched Capacitor Frequency-to-Current Conversion 2020
- VCO-based Feature Extraction Architecture for Low Power Speech Recognition Applications. 1175-1178. 2019
- A Highly Linear Ring Oscillator for VCO-based ADCs in 65-nm CMOS. 456-468. 2018
- Optimal NTF zero placement in MASH VCO-ADCs with higher order noise shaping. 805-808. 2018
- VCO-ADC Resolution Enhancement Using Maximum Length Sequences 2018
- Noise-shaping time-interleaved ADC based on a single ring oscillator and a sampling array. 683-686. 2017
- Spectral analysis of multibit VCO-ADCs and PFM-ADCs with sinusoidal inputs. 1258-1261. 2015
- A 0.03mm2, 40nm CMOS 1.5GS/s all-digital complementary PWM-GRO. 116-119. 2014
- FPGA-based implementation for steganalysis: a JPEG-compatibility algorithm 2013
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theses