Electronic International Standard Serial Number (EISSN)
A new multistage 1-1 sigma analogue-to-digital converter (ADC) architecture implemented only with voltage-controlled oscillators (VCOs) is introduced. A sturdy multistage noise-shaping (SMASH) configuration is used to avoid the need of either calibration circuitry or noise-cancellation filters. The digital nature of the VCO's output simplifies the implementation of the interconnection paths between stages, making unnecessary neither the use of multibit digital-to-analogue converters nor analogue subtraction elements. The basic operation of the architecture is shown at system level and the sensitivity to VCO's frequency mismatch is analysed. The proposed architecture has been validated through behavioural simulations.