publication venue for A Delta Sigma Modulator-Based Stochastic Divider. 69:3272-3283. 2022 Stochastic dividers for low latency neural networks. 68:4102-4115. 2021 Towards Low Latency and Resource-Efficient FPGA Implementations of the MUSIC Algorithm for Direction of Arrival Estimation. 68:3351 -3362. 2021 Codes for Limited Magnitude Error Correction in Multilevel Cell Memories. 67:1615-1626. 2020 Clock Jitter Analysis of Continuous-Time SigmaDelta Modulators Based on a Relative Time-Base Projection. 66:920-929. 2018 A Variational Approach for Designing Infinite Impulse Response Filters With Time-Varying Parameters. 65:1303-1313. 2018 Reducing the Power Consumption of Fault Tolerant Registers Through Hybrid Protection. 65:1293-1302. 2018 A pulse frequency modulation interpretation of VCOs enabling VCO-ADC architectures with extended noise shaping. 65:444-457. 2018 Towards a Dependable True Random Number Generator With Self-Repair Capabilities. 65:247-256. 2018 Combined SEU and SEFI Protection for Memories Using Orthogonal Latin Square Codes. 63:1933-1943. 2016 Analog-to-Digital Conversion Using Noise Shaping and Time Encoding. 55:2026-2037. 2008