Combined SEU and SEFI Protection for Memories Using Orthogonal Latin Square Codes Articles uri icon

authors

  • SANCHEZ-MACIAN, ALFONSO
  • REVIRIEGO VASALLO, PEDRO
  • MAESTRO, JUAN ANTONIO

publication date

  • November 2016

start page

  • 1933

end page

  • 1943

issue

  • 11

volume

  • 63

International Standard Serial Number (ISSN)

  • 1549-8328

Electronic International Standard Serial Number (EISSN)

  • 1558-0806

abstract

  • Radiation effects cause several types of errors on memories including single event upsets (SEUs) or single event functional interrupts (SEFIs). Error correction codes (ECCs) are widely used to protect against those errors. For a number of reasons, there is a large interest in using double data rate type three (DDR-3) synchronous dynamic random-access (SDRAM) memories in space applications. Radiation testing results show that these memories will suffer both SEUs and SEFIs when used in space. Protection against a SEFI and an SEU is needed to achieve high reliability. In this paper, a method to protect 16-bit and 64-bit data word memories composed of 8-bit memory devices against a simultaneous SEFI and an SEU is presented. The scheme uses orthogonal Latin square (OLS) codes and can be activated when a SEFI occurs, using a conventional double error correction approach otherwise.

keywords

  • error correcting codes; single event functional interrupt; single event upset; synchronous dynamic random access memory; sdram; logic gates; parity check codes; decoding; memory management