Design of SEU-Tolerant Turbo Decoders Implemented on SRAM-FPGAs Articles uri icon

authors

  • Gao, Zhen
  • Zhang, Lingling
  • Yan, Tong
  • Guo, Kangkang
  • Xu, Zhan
  • REVIRIEGO VASALLO, PEDRO

publication date

  • December 2020

start page

  • 2563

end page

  • 2572

issue

  • 12

volume

  • 28

International Standard Serial Number (ISSN)

  • 1063-8210

Electronic International Standard Serial Number (EISSN)

  • 1557-9999

abstract

keywords

  • duplication with comparison (dwc); faulttolerant; field-programmable gate array (fpga); single-event upsets (seu); turbo decoder