A lightweight implementation of the Tav-128 hash function Articles
- IEICE Electronics Express Journal
- June 2017
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- In this article we discuss the hardware implementation of a lightweight hash function, named Tav-128 , which was purposely designed for constrained devices such as low-cost RFID tags. In the original paper, the authors only provide an estimation of the hardware complexity. Motivated for this, we describe both an ASIC and an FPGA-based implementation of the aforementioned cryptographic primitive, and examine the performance of three architectures optimizing different criteria: area, throughput, and a trade-off between both of them.
- hardware implementation; hash function; asic; fpga