electronic international standard serial number (EISSN)
Presented is a new ADC topology based on an asynchronous PWM modulator followed by a VCO and a counter. The PWM modulator first encodes the analogue input into a binary waveform. Then, the VCO implements a multibit first-order noise shaping modulator, sampling and quantising the input signal encoded by the PWM modulator. With this architecture, the linearity of the whole converter is independent of the VCO linearity as the VCO is modulated by a two valued signal only. Proposed is a hardware implementation suitable for low power applications that does not require linear amplifiers.