Continuous Time Sigma-Delta Modulator Based on Binary Weighted Charge Balance Articles uri icon

publication date

  • April 2009

start page

  • 458

end page

  • 460

issue

  • 9

volume

  • 45

international standard serial number (ISSN)

  • 0013-5194

electronic international standard serial number (EISSN)

  • 1350-911X

abstract

  • A novel multibit continuous time sigma-delta modulator architecture that does not require a flash converter is presented. The quantiser of this modulator is similar to an integrating ADC that is operated with a binary weighted charge balancing algorithm. The charge residue in the integrating ADC at the end of each conversion cycle is accumulated for the next conversion, providing first-order noise shaping. The modulator order can be increased by the addition of more integrating stages.