A 73dB-A Audio VCO-ADC Based on a Maximum Length Sequence Generator in 130nm CMOS

This brief presents an open-loop audio VCO-ADC incorporating a Linear Feedback Shift Register as phase quantizer. The shift register counts the pulses of a current-controlled ring oscillator encoding the count with a maximum length sequence. This counting method improves the power consumption of the digital logic compared to conventional binary or Gray counters. Moreover, the cyclic structure of the maximum length sequence is seized to digitally correct metastability errors produced when sampling the ring oscillator outputs. A prototype chip has been implemented using the proposed architecture in 130nm CMOS occupying 0.01 mm 2 . The ADC can be directly connected to a capacitive MEMS microphone with a power consumption of 227uW and a peak signal-to-noise and distortion ratio of 73dB-A.

A 73dB-A Audio VCO-ADC Based on a Maximum Length Sequence Generator in 130nm CMOS Articles