A coarse-fine VCO-ADC for MEMS microphones with sampling synchronization by data scrambling Articles uri icon

authors

  • QUINTERO ALONSO, ANDRES
  • BUFFA, CESARE
  • Perez, Carlos
  • CARDES GARCIA, FERNANDO
  • Straeussnigg, Dietmar
  • Wiesbauer, Andreas
  • Hernandez, Luis

publication date

  • January 2020

start page

  • 29

end page

  • 32

volume

  • 3

International Standard Serial Number (ISSN)

  • 2573-9603

abstract

  • This letter presents a mostly digital analog-to-digital converter implemented with voltage-controlled oscillators that can directly interface a capacitive MEMS microphone. The ADC is based on two ring oscillators and a coarse-line counting circuitry. Coarse and line counters are synchronized using a novel data scrambling technique to mitigate metastability and timing errors. This method enables a very low power consumption in the digital post-processing circuit. The proposed ADC, prototyped in 130-nm CMOS, achieves 73.8 dB-A of signal-to-noise and distortion ratio (SNDR) peak and 97 dB of dynamic range (DR) in a 20-kHz BW, while consuming 240 μW from the 1.5-V/1.2-V power supplies. In a reduced power mode (8 kHz BW) with relaxed oscillation parameters, it reaches 66.4 dB-A of SNDR peak and 93 dB of DR with a power consumption of only 77 μW.

keywords

  • analog-to-digital converter; mems microphone; time-encoding; analog-to-digital converters implemented with voltage-controlled oscillators (vco-adc)