Low Redundancy Double Error Correction Spotty Codes Combined with Gray Coding for 64 Data Bits Memories of 4-bit Multilevel Cells Conference Contributions uri icon

event

  • 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)

event place

  • NOORDWIJK

country

  • HOLANDA - PAISES BAJOS

participation category

  • CONFERENCIA

edition country

  • ESTADOS UNIDOS DE AMERICA

publication date

  • 2019

start page

  • 1

end page

  • 4

isbn

  • 978-1-7281-2260-1

keywords

  • error correction codes; decoding; parity check codes; encoding; redundancy; complexity theory; phase change materials