Adapting concurrency throttling and voltage-frequency scaling for dense eigensolvers Articles uri icon

authors

  • ALIAGA, JOSE I.
  • BARREDA, MARIA
  • CASTANO, M. ASUNCION
  • DOLZ ZARAGOZA, MANUEL FRANCISCO
  • QUINTANA ORTI, ENRIQUE S.

publication date

  • January 2017

start page

  • 29

end page

  • 43

issue

  • 1

volume

  • 73

International Standard Serial Number (ISSN)

  • 0920-8542

Electronic International Standard Serial Number (EISSN)

  • 1573-0484

abstract

  • We analyze power dissipation and energy consumption during the execution of high-performance dense linear algebra kernels on multi-core processors. On top of this analysis, we propose and evaluate several strategies to adapt concurrency throttling and the voltage-frequency setting in order to obtain an energy-efficient execution of LAPACK's routine dsytrd. Our strategies take into account the differences between the memory-bound and CPU-bound kernels that govern this routine, and whether problem data fits into the processor's last level cache.

keywords

  • dense linear algebra; eigenvalue problems; concurrency throttling (ct); dynamic voltage-frequency scaling (dvfs); energy; high performance