EPICS based low-level radio frequency control system in LIPAc

The IFMIF-EVEDA (International Fusion Materials Irradiation Facility - Engineering Validation and Engineering Design Activity) linear accelerator, known as Linear IFMIF Prototype Accelerator (LIPAc), will be a 9 MeV, 125 mA continuous wave (CW) deuteron accelerator prototype to validate the technical options of the accelerator design for IFMIF. The primary mission of such facility is to test and verify materials performance when subjected to extensive neutron irradiation of the type encountered in a fusion reactor to prepare for the design, construction, licensing and safe operation of a fusion demonstration reactor (DEMO). The radio frequency (RF) power system of IFMIF-EVEDA consists of 18 RF chains working at 175 MHz with three amplification stages each. The low-level radio frequency (LLRF) controls the amplitude and phase of the signal to be synchronized with the beam and it also controls the resonance frequency of the cavities. The system is based on a commercial compact peripheral component interconnect (cPCI) field programmable gate array (FPGA) board, provided by Lyrtech and controlled by a Windows host PC. For this purpose, it is mandatory to communicate the cPCI FPGA board from EPICS Channel Access [1]. A software architecture on EPICS framework in order to control and monitor the LLRF system is presented.

EPICS based low-level radio frequency control system in LIPAc Articles